The most obvious addressing mode for accessing main memory is called direct addressing mode. 访问主存最显而易见的寻址模式称为直接寻址模式。
The listing introduces the concept of functions, various memory addressing schemes, the stack and the use of a library function. 这个清单演示了函数、各种内存寻址方案、堆栈和库函数的使用方法。
A memory map is the addressing plan for the address bus bits. 存贮器布局就是地址总线各位的寻址平面图。
An interface between devices and a computer that has memory addressing potential and data transferring ability. 设备与计算机的接口设备,它具有存储器寻址能力和数据传送的能力。
This program memory addressing logic is handled by a register referred to as a program counter. 程序存储器的导址逻辑是由寄存器来实现的,这个寄存器叫程序计数器。
The read pointer is connected to the memory bank for addressing a second memory location to read a datum stored therein onto an output data bus. 所述读取指针连接到存储体,用于寻址第二存储器位置,以将存储在其中的数据读取到输出数据总线上。
In the subsystem processor and memory module, the logical relationship between the chips and the addressing assignment about the memory chips are clarified. 通信卡子系统处理器和存储器模块主要介绍了各芯片间控制信号的逻辑关系以及系统中各存储器芯片的地址分配方式;
Design of the embedded DSPs 'architecture was described at this aspects: bus structure, instruction system, memory system, pipeline and addressing mode, etc. 本文就总线结构、指令系统、存储系统、流水线、寻址方式等几个方面对一个嵌入式DSP处理器μDSP的体系结构设计进行了详细的阐述。
We compared the strong points with weak points of memory addressing mode configuration and I/ O addressing mode configuration and described some technical problems and details. 比较了内存编址和I/O编址两种方案的优缺点,并论述了一些技术问题和细节。
The paper introduces the CPU structure, Memory composition, Peripheral resources and the addressing modes of DSP. 本文讲述了DSP的CPU结构、存储器构成、外设资源和指令寻址方式等。
In the protected address mode, the 80286 CPU has an extented memory addressing capability up to 16 megabytes. By calling the appropriate system BIOS functions, the data block transfer in the protected mode can be realized in a 80286 microcomputer easily. 80286CPU在保护地址方式下具有高达16M字节的存储器寻址能力,通过系统BIOS功能调用可以很方便地实现保护地址方式下的数据块传输。
According to demand of an applying system, this paper designs an extern circuit, which visits 96K memory by 16 addressing lines, and solves the problem of reuse of ROM/ RAM memory. 根据应用系统的要求,设计了用16根地址线寻扯96K内存的扩展电路,解决了ROM与RAM32K地址空间的复用问题。
Because LFSRs inherently remember their previous value, the design of the LFSR generic FIFO memory takes advantage of much less logic cells to complete addressing read and write addresses at a faster speed. 在LFSR通用FIFO的设计中,因为线性反馈移位寄存器自身固有的记忆能力,作者将LFSR运用到FIFO的具体设计中,得到LFSR通用FIFO具有更少的逻辑单元,更快的寻址速度;
The platform introduces two memory system structure, addressing mode simulation guarantees that not only the operand is correctly obtained, but also the instruction execution time is correctly calculated. 采用了两种存储器体系结构,寻址方式的模拟不仅保证了正确地确定操作数,而且能够正确统计指令执行时间。
The main control logic of DDR2 memory, clock management, addressing mode and the implementation of trigger function under long storage mode are analyzed in detail in the thesis. 论文在高速大容量数据存储控制器的设计部分详细分析了DDR2内存的主控制逻辑,时钟管理、寻址方式和长存储模式下触发功能的设计。